a generic circuit modeling strategy combining symbolic and numeric analysis
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A GENERIC CIRCUIT MODELING STRATEGY COMBINING SYMBOLIC AND NUMERIC ANALYSIS
Ralf Sommer, Manfred Thole, Eckhard Hennig
ITWM – Institut für Techno- und Wirtschaftsmathematik, Kaiserslautern, Germanysommer, thole, hennig@itwm.uni-kl.de
ABSTRACT
In this paper we present a generic modeling strategy for thederivation of approximated symbolic expressions forsmall-signal characteristics of analog circuits. This ap-proach is characterized by a tight interaction between sym-bolic and numeric computations to ensure continuous errorcontrol and verification of the results. The workflow mayalso be extended to the derivation of nonlinear circuit char-acteristics.
1. INTRODUCTION
Just as in numerical circuit simulation appropriate model-ing of circuits and devices holds the key for obtaining suit-able results from symbolic circuit analyses. In fact, for thelatter, the usability of the results depends much more onthe choice of the models than in numerical simulation.While numerical simulations are usually aimed at veryhigh accuracy, which is achieved by choosing complexcomponent models, symbolic analysis is employed in adifferent way:
Symbolic analysis has a rather qualitative character be-cause one of its goals is to obtain interpretable analyticalformulas describing particular circuit characteristics of in-terest. This can only be achieved if circuit or device mod-els are used which are as simple as possible and onlydescribe the effect under investigation. Moreover, modelsfor symbolic circuit analysis should be designed with thefact in mind that expressions must be processed usingcomputer algebra, which restricts the set of usable model-ing functions to those which can be inverted analytically.
On the other hand, for symbolic analysis to be close to nu-merical circuit simulation (e.g. SPICE), symbolic devicemodels must have the same or similar numerical propertiesas their counterparts in numerical analysis. The symbolicdevice and circuit modeling strategy was designed to meet
this requirement. It will be demonstrated how symbolicanalysis can be applied in combination with numerical ref-erence simulations to generate analytic expressions whichare guaranteed to be meaningful and reliable.
In section 2, an outline of the methodology is given fol-lowed by several examples, in which the details of themodeling strategy are clarified. As an example an opera-tional amplifier will be analyzed in section 3. It will alsobe shown that the derived analysis results may be used fordesign. This will be achieved by extracting informationwhich can be used to find circuit modifications such thatnew performance requirements are met.
The following sections contain additional information tothe slides of the presentation following this paper. Equa-tions and diagrams are therefore not repeated here and re-ferred to when necesary. All computations were performedusing our symbolic circuit analysis and design toolbox An-alog Insydes [1] running under Mathematica 3.0 [2].PSpice Design Center [3] was used for additional numeri-cal circuit simulations.
2. SYMBOLIC ANALYSIS WORK FLOW
In this section a modeling strategy for the derivation of ap-proximated symbolic expressions for small-signal circuitcharacteristics is presented. A particularly important aspectof this approach is the interaction between symbolic andnumeric computations to ensure continuous error controland verification of the results. The symbolic circuit modelgeneration strategy can be divided into the following steps:
1. Start with a numerical SPICE simulation of the circuitunder examination and make sure that the effect ofinterest can be observed.
2. Focus on one task or effect of interest only and use themathematically simplest analysis method (do not take asledgehammer to crack a nut, e.g. transient analysis fora small-signal effect)
3. Generate a symbolic netlist with numerical reference
information for semi-symbolic analyses and symbolicapproximation techniques (including extraction ofsmall-signal parameters from the simulator output file)
4. Select the same set of device models for symbolicanalysis as for the preceding numerical analyses inStep 3.
5. Ensure validity of netlist and models by comparingsemi-symbolic analysis results with the numericalsimulation.
6. Iteratively select simpler device models as long as thedeviation from the SPICE reference simulation is tol-erable. Check deviations by semi-symbolic analysiswithout employing approximation methods.
7. Perform symbolic analysis using symbolic approxima-tion, pole/zero extraction, etc. Always check numeri-cally evaluated results against the referencesimulation.
8. For any result (numeric & symbolic): Perform plausi-bility check ("do not trust any simulation results...")
Slide 5 shows a graphical representation of the model-ing strategy.
3. EXAMPLE: ANALYSIS AND DESIGN OF AN OPERATIONAL AMPLIFIER
In the following example an operational amplifier is ana-lyzed step by step according to the flow diagram. Symbol-ic analysis is applied to extract a formula which describesthe underlying overshoot effect in terms of the circuit pa-rameters. It will be highlighted how numerical circuit sim-ulation, symbolic analysis, and –especially– symbolicapproximation techniques can be combined.
Circuit Description
The circuit under investigation (slide 6) is an operationalamplifier for use in an integrated circuit [4]. The circuitdiagram of this operational amplifier topology is not fullydesigned yet, and some parts of the circuit were simpli-fied. The current sources and the voltage source establishthe DC operating points for the amplifier stages. Thesesources are implemented using transistors and resistors,but were substituted by ideal sources for simplicity. Theinput signals applied to the basis of the transistors Q1 andQ2 are amplified in four cascaded amplifier stages. Thefirst stage is composed of the transistors Q1 and Q2 whichform a differential amplifier. The current source I1 estab-lishes the bias points for the transistors Q1 and Q2 whichare assumed to be matching. If the input voltage applied tothe bases are identical the current I1 splits equally betweenthe transistors Q1 and Q2 because of the circuit’s symme-try. Thus, the emitter bias currents are 10µA. The collec-
tor currents are slightly less than 10µA since a smallfraction of the emitter current is due to the base current.The second amplifier stage is formed by transistor Q3which acts as an emitter follower. Current source I4 sup-plies the DC bias current to the emitter of transistor Q3.The third amplifier stage is composed of transistor Q4which forms a common emitter amplifier. The output sig-nal is taken from the collector of transistor Q4, and theDC bias current for the collector of transistor Q4 is pro-vided by the current source I3. The final stage of the am-plification is formed by transistor Q5, Q6 and the emitterresistors. This circuit is similar to a class B push-pull cir-cuit. Because of the extremely high voltage gain a verysmall DC input voltage can result in a saturation or cutoffof the output stages. In fact, a slight mismatch of the inputtransistors can cause this behavior, even for zero inputvoltages. That is the reason why the circuit is working un-der feedback.
Numerical Simulation
Slide 6 shows an operational amplifier circuit togetherwith the two transient simulations performed at differentfrequencies of a rectangular input signal. From the tran-sient behavior it can be seen that dynamic effects are in-volved yielding a more distorted signal for higherfrequencies.
Formulate Design Goals and Tasks
As a consequence of the effects observed in the numericalsimulation the following design goal is formulated:
How can the circuit be modified for reduced distor-tion and less overshoot in the step response?
To solve this design task a systematic approach usingsymbolic analysis techniques is taken. Prerequisites forsuccessful application of symbolic techniques are to keepthe approach simple by concentrating on selected circuitcharacteristics only and to avoid mathematical overload ofthe problem. To keep symbolic results compact and inter-pretable the underlying cause of the observed effect hasto be clearly identified. For the application of symbolicanalysis, problem classes which can be rooted to linear ef-fects have the best chances for being solvable.
Hence, a closer look at an AC analysis was taken. FromSlide 7 it can be recognized that the frequency responseexhibits a resonance peak which obviously originatesfrom a frequency compensation problem. All tasks relatedto the compensation of the circuit can be solved by apply-ing linear transfer function analysis and symbolic approx-imation. This reflects the principle that no “sledgehammershould be taken to crack a nut”, which means that tran-sient analysis can be avoided.
Generate Analog Insydes Netlist
For the application of symbolic analysis, especially sym-bolic approximation, the next step is to generate a symbol-ic netlist including the numerical reference information.Slide 8 shows the input data from PSpice which is beingused to generate the Analog Insydes netlist. While this cir-cuit description and the numerical values of the elementsare contained in the simulator input file the operatingpoint information and the values for the small-signal pa-rameters of the transistors have to be extracted from thesimulator output file. This task is performed by the netlisttranslator spice2ai which can be directly called fromthe Mathematica command line. The output is a netlistcontaining symbolic values for each network element aswell as the corresponding numerical reference informa-tion. Since the generated Analog Insydes netlist has only ageneric model reference for each transistor correspondingdevice model definitions have to be added to the database. Device models have to be provided either by imple-menting a globally accessible library or by adding modelstatements to the netlist.
Ensure Validity of Netlist and Models
The next step in the flow is to ensure the validity of thenetlist and the models. Therefore, the two small-signalmodels shown in slide 10 have been defined. The first onewith the selector PSpiceAC contains the complete small-signal equivalent circuit as used in PSpice. The othermodel definition stored under the selector SimpleACcontains a simplified small-signal equivalent circuit with-out ohmic base, emitter and collector resistances.
Now everything is prepared for symbolic and semi-symbolic network analysis. First, we let Analog Insydesreplace all model references in the netlist by the fullPSpice model. Once it is ensured that the results obtainedusing this model are identical to the numerical PSpicesimulation then simpler models can be introduced step bystep. The result of the semi-symbolic transfer function isshown in slide 11. The function is a polynomial of order22 which has an estimated number of terms of more than2.7⋅1018 in fully symbolic form.
It should be noticed that before solving this semi-sym-bolic system of equations Mathematica’s floating pointaccuracy has to be set to infinity since it has to be ensuredthat no numerical errors are introduced during the elimi-nation process. The reason why floating-point precision isinsufficient is that the coefficients of the characteristicpolynomial have a much wider range than can be handledreliably by machine-precision calculations. Since thepoles and zeros are very sensitive with respect to the poly-nomial coefficients the only way to exclude errors is to
use arbitrary-precision arithmetic as provided by a com-puter algebra system.
Find the Most Simple ModelsTo avoid excessive expression growth during the subse-
quent symbolic analysis the complexity of the devicemodels has to be reduced. An approximated model mustbe as simple as possible but must still cover the effect ofinterest within an acceptable tolerance as compared withthe PSpice simulation. Once such a model is found sym-bolic analysis and symbolic approximation can be appliedto derive formulas describing the frequency behavior ofthe operational amplifier. Slide 12 shows the semi-sym-bolic analysis results when expanding the circuit with thesimplified AC (SimpleAC) model. Note that the result-ing polynomial is only of order eight and has an estimatednumber of terms of about seven million when computed infully symbolic form.
Semi-symbolic Analysis vs. PSpice Simulation
A comparison of the semi-symbolic analysis results de-rived by Analog Insydes with the numerical simulation re-sults obtained by PSpice is shown in slide 12. To checkthe correspondence between both functions the Analog In-sydes CSDF reader is used to read in the PSpice simula-tion data. As illustrated in the slide the two curves areidentical which means that numerical information passedto the symbolic analysis tool as well as all symbolic de-vice models are correct.
Again, the results are compared, which is shown in slide13. The transfer function derived with the simple ACmodel exhibits a slight deviation in the high-frequency be-havior. On the other hand, up to the cut-off frequency ofthe amplifier, the traces show no significant deviation. Forthe following symbolic analysis it is therefore sufficient touse this simplified PSpice transistor equivalent circuit.
Symbolic Analysis and Symbolic Approximation
In order to extract an interpretable formula describing thebehavior of the circuit in the region of interest it is neces-sary to compute an approximated symbolic transfer func-tion. Therefore, simplification-before-generation tech-niques followed by further postprocessing steps are used.Simplification Before Generation (SBG) is performed onthe system of symbolic circuit equations using one ormore design points. The selection of design points has alarge impact of the approximation results; an appropriatechoice of design point frequencies and errors requiressome experience. Since the task is to compute a good ap-proximation of the resonance region one design point isplaced near the dominant complex pole pair in the s-plane.The other design point was placed on the imaginary axis
at 10kHz to ensure a valid approximation with respect tothe lower frequency gain:
The symbolic result after application of SBG is to fol-lowing formula which is of order five and has about 128terms.:
To verify the result of the approximated function it isevaluated with numerical reference values and plotted to-gether with the original function in a pole-zero plot and aBode plot. Despite the fact that the complexity of the sym-bolic function has been reduced from over seven millionterms to just 128 the plots show only a small deviation be-tween the original and the approximated function. Follow-ing these checks we can start to focus on the initial design
task, i.e. finding an appropriate compensation for low aswell as for high gain application of the amplifier.
Interpretation of Symbolic Analysis Results
Due to the fact that the 128-term formula of the transferfunction is still too complex to be interpreted symbolicallywe generate a sequence of root locus plots to determinethe influences of the designable parameters on the fre-quency behavior graphically. From the approximatedsymbolic formula we select those variables whose valuescan be modified independently. This includes all resistorsand capacitors, which can be resized arbitrarily, and alsosome elements in the small-signal equivalent circuits ofthe BJTs. Transistor capacitances and resistances can beregarded as designable parameters if the desired circuitmodification can be achieved by connecting additionalshunt resistors or capacitors in parallel with such an ele-ment. For example, the capacitor between base and collec-tor of transistor Q4 can be increased by adding a shuntcapacitor between base and collector of this transistor.From the root locus plot it can be read off that increasingthis capacitance causes the dominant complex pole pair tomove towards the imaginary axis. This implies increasedovershoot, hence this type of circuit modification is notsuitable.
The situation is different for the compensation capacitorComp. At a gain of ten it can be noticed that the positionof the poles moves down in the left half of the complexplane towards the real axis. Hence, the critically dampedcase (real part = imaginary part) can be obtained by select-ing an appropriate value for the compensation capacitor.
From the root locus plot of the feedback resistor RF2 itfollows that for lower gains the imaginary parts of thepoles increase while the real part remains nearly constant.As a consequence, overshoot becomes larger for lowergains. This fact has to be considered when selecting thevalue of the compensation capacitor. The plot on the rightshows the movement of the poles w.r.t. the compensationcapacitor again, but now for a gain of one. Taking into ac-count all these dependencies a value of 30pF was chosenfor the compensation capacitor. This value ensures both asufficiently high bandwidth and low overshoot for smallclosed-loop gain.
Slide 18 shows a symbolic formula for the gain whichwas derived using three design points (see below) at dif-ferent frequencies as well as different values of RF2 and acompensation capacitor of 30pF. The application of SBGin combination with SAG yields a compact formula of or-
dp = 8ReplacementTable@Join@dpdiffamp, 8s → N@2PiI10.∗10^3D, MaxError → 0.2<D,ReplacementTable@Join@dpdiffamp, 8s → −2.0 * 6+ 1.1 * 7I, MaxError → 0.4<D<;
−Hgm$Q3Hgm$Q1HRF1+ RF2LHCbe$Q2sHgm$Q8− Cbc$Q8sL + gm$Q2Hgm$Q7+gm$Q8+ HCbe$Q7+ Cbe$Q8L sLL+Cbe$Q1sHCbc$Q1Cbe$Q2RF1RF2s2Hgm$Q8− Cbc$Q8sL+
gm$Q2Hgm$Q7HRF1+ RF2L + HHCbc$Q8+Cbe$Q7+ Cbe$Q8L RF1+HCbc$Q8+ Cbe$Q7+ Cbe$Q8+Cbc$Q1gm$Q8RF1L RF2L s−Cbc$Q1Cbc$Q8RF1RF2s2LLL
VsigL ëHgm$Q1gm$Q2gm$Q3Hgm$Q7+ gm$Q8L RF1+gm$Q3HHCbe$Q7gm$Q1gm$Q2+ Cbe$Q8gm$Q1gm$Q2+
Compgm$Q1gm$Q7+ Cbe$Q1gm$Q2gm$Q7+ Compgm$Q2gm$Q7−Cbc$Q1gm$Q1gm$Q8+ Cbe$Q2gm$Q1gm$Q8− Cbc$Q1gm$Q2gm$Q8L RF1+
CompHgm$Q1+ gm$Q2L gm$Q7RF2L s+HHHCbe$Q7+ Cbe$Q8L HCompgm$Q1+ HCbe$Q1+CompL gm$Q2L gm$Q3+HCbc$Q4Cbe$Q3Hgm$Q1+ gm$Q2L + HCbe$Q1+Cbe$Q2L Compgm$Q3L gm$Q7+Cbc$Q1gm$Q3HCbc$Q8Hgm$Q1+ gm$Q2L − HCbe$Q1+Cbe$Q2L gm$Q8L +Cbc$Q8H−Cbe$Q2gm$Q1gm$Q3+ Compgm$Q1gm$Q3+
Cbe$Q1gm$Q2gm$Q3+ Compgm$Q2gm$Q3+ Cbc$Q4gm$Q1gm$Q7+Cbc$Q4gm$Q2gm$Q7+ Cbc$Q4Hgm$Q1+ gm$Q2L gm$Q8LL
RF1+HCbe$Q8Compgm$Q1gm$Q3+Cbe$Q8Compgm$Q2gm$Q3+ Cbe$Q7CompHgm$Q1+ gm$Q2L gm$Q3+Cbc$Q4Cbe$Q3gm$Q1gm$Q7+ Cbc$Q4Cbe$Q3gm$Q2gm$Q7+Cbe$Q1Compgm$Q3gm$Q7+ Cbe$Q2Compgm$Q3gm$Q7+Cbc$Q8Hgm$Q1+ gm$Q2L HCompgm$Q3+ Cbc$Q4Hgm$Q7+gm$Q8LL +
Cbe$Q1Compgm$Q2gm$Q3gm$Q7RF1L RF2Ls2+HHCbe$Q1+ Cbe$Q2L HCbc$Q1Cbc$Q8+ HCbc$Q8+Cbe$Q7+ Cbe$Q8L CompL gm$Q3RF1+Cbc$Q4HCbe$Q3HCbe$Q7+ Cbe$Q8L Hgm$Q1+ gm$Q2L +HCbe$Q1+ Cbe$Q2L Cbe$Q3gm$Q7+ Cbc$Q8HHCbe$Q3+Cbe$Q7+ Cbe$Q8LHgm$Q1+ gm$Q2L + HCbe$Q1+Cbe$Q2L Hgm$Q7+ gm$Q8LLLRF1+Compgm$Q3HHCbe$Q1+ Cbe$Q2L HCbc$Q8+ Cbe$Q7+Cbe$Q8L +
Cbe$Q1HHCbc$Q8+ Cbe$Q7+ Cbe$Q8L gm$Q2+Cbe$Q2gm$Q7L RF1L RF2+Cbc$Q4HCbe$Q3HHCbe$Q7+ Cbe$Q8L Hgm$Q1+ gm$Q2L +HCbe$Q1+ Cbe$Q2L gm$Q7+ Cbe$Q1gm$Q2gm$Q7RF1L +
Cbc$Q8HHCbe$Q3+ Cbe$Q7+ Cbe$Q8L Hgm$Q1+gm$Q2L +HCbe$Q1+ Cbe$Q2L Hgm$Q7+ gm$Q8L +Cbe$Q1gm$Q2Hgm$Q7+ gm$Q8L RF1LLRF2L
s3+HCbc$Q4HCbe$Q1+ Cbe$Q2L HCbe$Q3HCbe$Q7+ Cbe$Q8L +
Cbc$Q8HCbe$Q3+ Cbe$Q7+ Cbe$Q8LL RF1+Cbe$Q1Cbe$Q2HCbc$Q8+ Cbe$Q7+ Cbe$Q8L Compgm$Q3RF1RF2+Cbc$Q4HHCbe$Q1+ Cbe$Q2LHCbe$Q3HCbe$Q7+ Cbe$Q8L + Cbc$Q8HCbe$Q3+Cbe$Q7+ Cbe$Q8LL +Cbe$Q1HCbe$Q3HCbe$Q7+ Cbe$Q8L gm$Q2+ Cbe$Q2Cbe$Q3gm$Q7+Cbc$Q8HHCbe$Q3+ Cbe$Q7+ Cbe$Q8L gm$Q2+Cbe$Q2Hgm$Q7+ gm$Q8LLL RF1L
RF2Ls4+Cbc$Q4Cbe$Q1Cbe$Q2HCbe$Q3HCbe$Q7+ Cbe$Q8L + Cbc$Q8HCbe$Q3+Cbe$Q7+ Cbe$Q8LL RF1RF2s5L
der 2 from which the dominating pole was symbolicallyextracted.
Note that compared to the uncompensated circuit withthe 128-term formula of order five, symbolic analysis andapproximation now yields a more compact result with alower number of terms, better accuracy, and lower poly-nomial degree.
High Gain Compensation
As a consequence of the dependence of the overshoot ef-fect on the gain another design task can be formulated:
Find an appropriate compensation for the amplifier in ahigh-gain configuration (80dB) such that a maximumGBW product is obtained.
The strategy employed to solve this task is the same asbefore (see slide 19): First an approximated function isgenerated and validated by comparison against the PSpicesimulation. Then all designable parameters are extractedfrom the approximated function, and root locus plots aregenerated for each of these parameters. From the root lo-cus plot of the output resistance ROQ4 it follows that it ispossible to obtain critical damping by reducing the resis-tance to a value of about 8kΩ . Alternatively, CBCQ4 canbe increased whereas, on the other hand, increasing e.g.CBEQ3 results in larger overshoot since the poles movecloser towards the imaginary axis.
With respect to the other design criterion, i.e. band-width, reducing ROQ4 is better than increasing CBCQ4. APSpice simulation confirms this result: It is possible to ob-tain a bandwidth of about 100kHz without overshoot(slide 20).
Note that the resistor in parallel to ROQ4 influences thebias point of Q4. Therefore, the source current I3 has to beadapted such that the operating point remains unchanged.
4. CONCLUSIONS
A systematic modeling and analysis strategy has been de-veloped which is based on a strong interaction with nu-merical circuit simulator including data exchange between
circuit simulator and symbolic analysis tool to ensure thevalidity of the derived results. The methodology incorpo-rates a large variety of symbolic analysis and postprocess-ing features. In the example equation-basedapproximation has been applied to pole/zero analysis, andthe interpretation of symbolic analysis results allowed forfinding appropriate (and sometimes even unexpected) cir-cuit modifications to reach design goals.
It should be pointed out again that the results of the pre-ceding examples were obtained by a straightforward ap-plication of symbolic techniques without any specificknowledge of the circuit under investigation. In this way,it was possible to systematically determine some circuitmodifications that allow to reach the initial design goals.Of course, all results are subject to critical review with re-spect to implied unwanted side-effects which were nottaken into consideration, such as reduced open-loop gainand output swing due to decreasing ROQ4.
ACKNOWLEDGMENTS
This work has been carried out within the MEDEA projectA409 "Systematic Analog Design Environment" (SADE).
REFERENCES
[1] E. Hennig, Analog Insydes Tutorial, ITWM, Kaiserslaut-ern, 1997
[2] Stephen Wolfram, The Mathematica Book, 3rd ed., Wol-fram Media/Cambridge University Press, 1996
[3] PSpice Version 8.0, MicroSim Corporation, Irwine, 1997
[4] A. R. Hambley, "Electronics - A top down approach tocomputer-aided circuit design", Prentice Hall, 1994
[5] E. Hennig, R. Sommer, „Application of Computer AlgebraMethods to Analog Circuit Sizing“, in Proc. EuropeanConference on Circuit Theory and Design 1995, Istanbul,August 1995
[6] R. Sommer, E. Hennig, G. Dröge, E.-H. Horneber, "Equa-tion-Based Symbolic Approximation by Matrix Reductionwith Quantitative Error Prediction", Alta Frequenza–Rivis-ta di Elettronica, No. 6, Dec. 1993, pp. 29–37
[7] J. M. Tweer. E. Hennig, R. Sommer, "Enhanced SymbolicMatrix Approximation Techniques", in Proc. SMACD’98
dp = 8ReplacementTable@Join@dpdiffamp, 8RF2 −> 1000., Comp −> 30.0∗10^−12,s → N@2PiI475.∗10^3D, MaxError → 0.2<D,
ReplacementTable@Join@dpdiffamp, 8RF2 −> 100000., Comp −> 30.∗10^−12,s → N@2PiI1.∗10^6D, MaxError → 0.2<D,
ReplacementTable@Join@dpdiffamp, 8RF2 −> 10000., Comp −> 30.∗10^−12,s → N@2PiI1.0∗10^3D, MaxError → 0.2<D<;
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
A Generic Circuit Modeling Strategy Combining Symbolic and Numeric
Analysis
Ralf Sommer, Manfred Thole, Eckhard Hennig
ITWM – Institute of Industrial MathematicsKaiserslautern, Germany
sommer, thole, hennig@itwm.uni-kl.de
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Outline• Generic modeling strategy
• Analysis and design of an operational amplifier
• Netlist generation
• Model selection
• Pole/zero extraction and root locus analysis
• Circuit modifications derived from symbolic analysis results
• Conclusions
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Applied Symbolic Analysis
Generic Circuit Modeling Strategy
1. Start with numerical simulation
2. Focus on one task or effect:Do not take a sledgehammer to crack a nut(TRAN analysis for an AC effect)
3. Generate a symbolic netlist with numerical reference information (including extraction of small-signal parameters from the simulator output file)
4. Select appropriate models for symbolic analysis
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Generic Circuit Modeling Strategy (cont.)
5. Ensure validity of netlist and models by comparing semi-symbolic analysis results with numerical simulation (SPICE)
6. Find the most simple models which still meet the reference simulation (by exact semi-symbolic analysis)
7. Perform symbolic analysis, including symbolic approximation, pole/zero extraction etc. Always check numerically evaluated results against reference simulation
8. For any result (numeric & symbolic): Check plausibility – don’t trust any simulation results!
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Flow Diagram
schematic, netlist
simulation
interest
OP/AC params
extract effects of
semi-symbolic analysis
correspondence?
spice2ai è AI netlist
no
symbolic approximation
result o.k.?
chan
ge
AI m
odel
s
SPICE
AItechno
libs
netlist,
no
yessuccess
AI circuit: netlist+ models + DP
yes
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Analysis and Design of an OPAmp
+VB
Comp
1p+Vsig
1k
RF1
+I4
+VCC
+ VDD+I1
+I3
Q4Q2N2907A
Q5
Q2N2222
Q3Q2N2907A
Q7
Q2N2907A Q2N2907AQ8
Q2N2222
Q2
Q2N2222
Q1
Q2N2907A
Q6
20R1
20R2
RF2
10k100kRL
0
0
0
0
0
VDB
8
10
7
3
in
413
11
6
2
2
12
1
5
9
Design goals w.r.t.:• Transient behavior• Frequency behavior• Compensation
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SMACD’98R. Sommer, M. Thole, E. Hennig
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SMACD98_ITWM.fm
Step 2. Focus on one task or effectFormulate detailed (design) tasks: Find
• a symbolic description of resonance behavior.
• those circuit elements which have dominant influence on it.
• a compensation for low gains.
• a circuit modification such that high gain frequency response will be compensated for maximum bandwidth and minimized overshoot.
8
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SMACD98_ITWM.fm
Step 3: Generate a symbolic netlist with numerical reference information
**** OPERATING POINT INFORMATION TEMPERATURE = 27.000 DEG C**** BIPOLAR JUNCTION TRANSISTORSNAME Q_Q1 Q_Q2 Q_Q3 Q_Q4 Q_Q5 MODEL Q2N2222 Q2N2222 Q2N2907A Q2N2907A Q2N2222 IB 1.04E-07 1.07E-07 -2.56E-07 -4.11E-06 5.52E-06 IC 9.80E-06 9.99E-06 -5.39E-05 -1.00E-03 9.52E-04 VBE 5.22E-01 5.22E-01 -6.47E-01 -7.23E-01 6.40E-01 VBC -1.44E+01 -1.36E+01 1.36E+01 1.36E+01 -1.43E+01 VCE 1.49E+01 1.42E+01 -1.43E+01 -1.43E+01 1.50E+01 BETADC 9.42E+01 9.38E+01 2.10E+02 2.44E+02 1.73E+02 GM 3.79E-04 3.86E-04 2.08E-03 3.87E-02 3.67E-02 RPI 2.97E+05 2.90E+05 1.10E+05 6.47E+03 5.22E+03 RX 1.00E+01 1.00E+01 1.00E+01 1.00E+01 1.00E+01 RO 9.03E+06 8.77E+06 2.40E+06 1.29E+05 9.28E+04 CBE 3.30E-11 3.30E-11 3.24E-11 5.62E-11 5.13E-11 CBC 2.62E-12 2.66E-12 3.01E-12 3.01E-12 2.62E-12 CJS 0.00E+00 0.00E+00 0.00E+00 0.00E+00 0.00E+00 BETAAC 1.12E+02 1.12E+02 2.30E+02 2.50E+02 1.92E+02 CBX 0.00E+00 0.00E+00 0.00E+00 0.00E+00 0.00E+00 FT 1.69E+06 1.72E+06 9.36E+06 1.04E+08 1.08E+08
V_VB 7 6 DC 1.4 C_Comp 4 7 1p V_Vsig in 0 DC 0 AC 1+PULSE -1 1 0 0 0 1u 2uQ_Q1 13 1 3 Q2N2222Q_Q2 4 0 3 Q2N2222Q_Q3 0 4 5 Q2N2907AQ_Q4 7 5 11 Q2N2907AQ_Q5 11 7 8 Q2N2222Q_Q6 12 6 10 Q2N2907AQ_Q7 13 13 11 Q2N2907AQ_Q8 4 13 11 Q2N2907AR_R1 8 9 20 R_R2 9 10 20 ....lines omitted....
PSpice:
file.CIR & .OUT
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SMACD98_ITWM.fm
Generate an Analog Insydes netlist:In[2]:= SpiceToAI@"d:êdocsêSMACD98êModelingêOPAmp_1.net",
Spice2aiOptions→ "−psched −designpt"DOut[2]= CheckedNetlistB8VB, 87, 6<, Symbolic→ VB, Type→ VoltageSource, Value→ VB, DC→ 1.4<,8Comp, 84, 7<, Symbolic→ Comp, Type→ Capacitor, Value→ 1.×10−12<,:Vsig, 8in, 0<, Symbolic→ Vsig, Type→ VoltageSource, Value→ Vsig,
AC→ 1, Transient→ PulseWaveB−1, 1, 0, 0, 0, 11000000
,1
500000F>,8Q1, 813→ C, 1→ B, 3 → E<, Selector→ View, Model→ Q2N2222, IB→ 1.04×10−7,
IC→ 9.8×10−6, VBE→ 0.522, VBC→ −14.4, VCE→ 14.9, BETADC→ 94.2,GM→ 0.000379, RPI→ 297000., RX→ 10., RO→ 9.03×106, CBE→ 3.3×10−11,CBC→ 2.62×10−12, CJS→ 0., BETAAC→ 112., CBX→ 0., FT→ 1.69×106<,8Q2, 84→ C, 0→ B, 3 → E<, Selector→ View, Model→ Q2N2222, IB→ 1.07×10−7,IC→ 9.99×10−6, VBE→ 0.522, VBC→ −13.6, VCE→ 14.2, BETADC→ 93.8,GM→ 0.000386, RPI→ 290000., RX→ 10., RO→ 8.77×106, CBE→ 3.3×10−11,CBC→ 2.66×10−12, CJS→ 0., BETAAC→ 112., CBX→ 0., FT→ 1.73×106<F
design point data extracted from .out file
...some more output omitted...
10
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SMACD98_ITWM.fm
Step 4: Select models for symbolic analysisHere: PSpiceAC, SimpleAC, ...
C
GM*VPIRPI
RO
RX CBC
CBE
CBX
GU
RC
RE
VPI
B
E
CJS
S
C
GM*VPIRPI
RO
CBC
CBEVPI
B
S
Model@Name → BJT, Selector→ SimpleAC,Ports → 8B, C, E<,Parameters→ 8RPI, RO, GM, CBC, CBE,
Rpi, Ro, Gm, Cbc, Cbe<,Definition→ Netlist@8RPI, 8B, E<, Symbolic → Rpi, Value → RPI<,8RO, 8C, E<, Symbolic → Ro, Value → RO<,8CBC, 8B, C<, Symbolic → Cbc, Value → CBC<,8CBE, 8B, E<, Symbolic → Cbe, Value → CBE<,8VC, 8B, E, C, E<, Symbolic→ Gm, Value → GM<DD
Model@Name → BJT, Selector→ PSpiceAC,Ports → 8B, C, E<,Parameters→ 8RX, RPI, RO, RC, RE, GM, CBX, CBC, CBE, CJS, GU,
Rx, Rpi, Ro, Rc, Re, Gm, Cbx, Cbc, Cbe, Cjs, Gu<,Translation→ 8 GU → 0<,Definition→ Netlist@8RX, 8B, BS<, Symbolic → Rx, Value → RX<,8RPI, 8BS, ES<, Symbolic → Rpi, Value → RPI<,8RO, 8CS, ES<, Symbolic → Ro, Value → RO<,8RC, 8C, CS<, Symbolic → Rc, Value → RC<,8RE, 8E, ES<, Symbolic → Re, Value → RE<,8GU, 8BS, CS<, Symbolic → Gu, Value → GU<,8CBX, 8B, CS<, Symbolic → Cbx, Value → CBX<,8CBC, 8BS, CS<, Symbolic → Cbc, Value → CBC<,8CBE, 8BS, ES<, Symbolic → Cbe, Value → CBE<,8CJS, 8CS, 0<, Symbolic → Cjs, Value → CJS<,8VC, 8BS, ES, CS, ES<, Symbolic→ Gm, Value → GM<DD
11
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SMACD98_ITWM.fm
Step 5: Ensure validity of netlist and models ...... by comparing semi-symbolic analysis results with the numerical simulationè derive semi-symbolic transfer function (PSpiceAC Model)
12th order polynomial
In[4]:= eqs = CircuitEquations[diffamp /. View -> PSpiceAC, SymbolicValues -> False]; In[6]:= N@HPSpiceAC@sDDOut[6]= H9.0072×1016H5.56327445839407×10605+ 1.007544011632871×10599s+ 5.51239205589662× 10591s2+
8.30843293781319×10583s3 +3.42576417812192×10575s4+ 5.64608612639432× 10566s5+4.87518269587267×10557s6 +1.613242737000430×10548s7− 6.59191738207167× 10538s8−5.29749779072570×10529s9 −9.49002393248278×10519s10− 6.79567758710447× 10509s11−2.175874640641790×10499s12−3.43802023416904×10488s13−2.795633532126607×10477s14−1.186880460253243×10466s15−2.293466024942126×10454s16−1.394406765677290×10442s17+3.22801545923306×10415s18−2.097860672298842×10388s19+3.12807703115850×10360s20−3.37240588244096×10331s21+ 1.83687× 10287s22LL ëH−5.01097984036451×10621− 1.055676189019641×10615s− 1.102842388057195×10608s2−
8.41605421773111×10600s3 −3.76055309331231×10593s4− 6.21214564683821× 10585s5−3.38775674371449×10577s6 −6.94912405222820×10568s7− 6.25592385099756× 10559s8−2.565613355375960×10550s9 −4.82751604379495×10540s10− 4.39650661285649× 10530s11−2.044459970906384×10520s12−5.01033771901726×10509s13− 6.42224760782228× 10498s14−3.96260497508019×10487s15−9.21599442379328×10475s16− 5.24604448698746× 10463s17+1.416418488630651×10437s18−1.161574554348150×10410s19+2.671063886441960×10382s20−2.90685356152902×10353s21+ 1.674539957915347× 10309s22L
22th orderpolynomial
symbolic:>2.7*1018
terms!
12
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SMACD98_ITWM.fm
Semi-symbolic analysis vs. numerical simulationIn[10]:= BodePlot@8voutSPICE@fD, HPSpiceAC@2. π IfD<, 8f, 1.,1.* 10<,
PlotPoints→ 300,PlotStyle→ 88RGBColor@0,1,0D, Thickness@0.007D<,8RGBColor@1,0,0D, Thickness@0.007D, Dashing@80.02, 0.02<D< <,PlotRange−> 88−100.,40.0<, Automatic<D
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10Frequency
-350-300-250-200-150-100-500
esahPHgedL
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10Frequency
-80-60-40-2002040
edutingaMHBdL
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10
Identical curves! è continue with
model simplification
simulation
semi-symbolic analysis
correspondence?
AI-CSDFreader
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SMACD98_ITWM.fm
Step 6: Find the most simple models ...... which still meet the SPICE reference simulation è semi-symbolic analysis without approximation
è simplified AC model (SimpleAC) yields 8th order polynomial
In[4]:=eqs = CircuitEquations[diffamp /. View -> SimpleAC, SymbolicValues -> False];
In[5]:=N[ V$9 /. SolveCircuitEquations[SetAccuracy[eqs, Infinity], V$9] // Simplify, 10]
Out[6]= 8H1.237940039×1028H−1.876737087×10189−3.382196215× 10182s−1.82916435×10175s2 −2.632276993×10167s3− 8.693109555× 10158s4−4.069718119×10149s5 +1.625862809×10140s6+ 8.805624591× 10130s7LL ëH2.3233×10216+ 4.87385×10209s+ 5.06004× 10202s2+ 3.82935×10195s3+
1.68368×10188s4 +2.6405×10180s5+ 1.24284× 10172s6+ 1.73158×10163s7+6.51358×10153s8L<
In[7]:=VoutSimpleAC[s_] = % ; C
GM*VPIRPI
RO
CBC
CBEVPI
B
Ssymbolic: >7.06 *106 terms
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SMACD98_ITWM.fm
Comparison of results
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10Frequency
-350-300-250-200-150-100-50
0
esahPHgedL
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10Frequency
-80
-60
-40
-20
0
20
40
edutingaMHBdL
1.E0 1.E2 1.E4 1.E6 1.E8 1.E10
HF behavior not fully covered,
but sufficient for analysis <10MHz
semi-symbolic analysis
correspondence?
chan
ge
AI m
odel
sAI circuit: netlist+ models + DPPSpice full PSpice
AC modelsimplifiedresult
(CSDF)
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SMACD98_ITWM.fm
Step 7: Perform symbolic analysis & check resultsè perform symbolic approximation in resonance region
• SBG yields symbolic expression of order 5 with 128 terms
original
-2×107 -1×107 1×107 2×107Re s
-2×107
-1×107
1×107
2×107
Im s
2– 106⋅ 1.1 106i max. error 0.4( )⋅+
10kHz max. error 0.2( )
Design points:
pole-pair causing overshoot
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SMACD98_ITWM.fm
Step 8 (cont.): ... check results ... ... by comparing numerically evaluated results with reference simulation (pole/zero and Bode plot):
1.E0 1.E2 1.E4 1.E6Frequency
-190
-187.5
-185
-182.5
-180
-177.5
-1751.E0 1.E2 1.E4 1.E6
1.E0 1.E2 1.E4 1.E6Frequency
0
10
20
30
401.E0 1.E2 1.E4 1.E6
Magnitude
Phase
original approximated
-2×107-1.5×107-1×107-5×106 5×106 1×1071.5×1072×107Re s
-2×107
-1.5×107
-1×107
-5×106
5×106
1×107
1.5×107
2×107Im s
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SMACD98_ITWM.fm
Step 7: Interpretation of symbolic analysis resultsExtract list of variables from symbolic formula
Generate parametric transfer function in Cbc$Q4
Generate root locus plots
In[20]:= ListOfVariables@voutSBGDOut[20]= 8Cbc$Q1, Cbc$Q4,Cbc$Q8, Cbe$Q1, Cbe$Q2, Cbe$Q3, Cbe$Q7,Cbe$Q8, Comp,gm$Q1,gm$Q2, gm$Q3, gm$Q7, gm$Q8, RF1, RF2, s,Vsig<
In[21]:= H1@s_, cbcq4_D = voutSBGê. Cbc$Q4→ cbcq4ê. dpdiffamp
Out[21]= H0.00208H−1.20693×10−6 − 2.01975×10−13s− 8.67032×10−21s2− 7.35723×10−30s3+ 2.88171×10−37s4LL ëH2.28219×10−10+ 4.31702×10−17s+ 3.42746× 10−24s2+ 1.65713×10−13cbcq4s2+ 1.37954×10−31s3+ 4.13034×10−20cbcq4s3+1.60597×10−39s4 +2.69885×10−27cbcq4s4+ 3.17034× 10−35cbcq4s5L
-2×107 -1×107 1×107 2×107Re s
-2×107
-1×107
1×107
2×107
Im s
-3×107 -2×107 -1×107 1×107 2×107 3×107Re s
-3×107
-2×107
-1×107
1×107
2×107
3×107
Im s
-2×107 -1×107 1×107 2×107Re s
-2×107
-1×107
1×107
2×107Im s
-2×107 -1×107 1×107 2×107Re s
-2×107
-1×107
1×107
2×107Im s
Cbc$Q4 Comp RF2 Comp
gain=1gain=10gain=10 gain=1..100
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SMACD98_ITWM.fm
Interpretation of symbolic analysis results (cont.)• additional shunt C to CBC$Q4 increases overshoot
• lower gain (lower RF2) increases overshoot
• Comp has to be selected taking into account RF2 (gain)
Symbolic analysis for Comp=30pF and gain=10SBG and SAG yields
−RF2Hgm$Q1gm$Q2Hgm$Q7+gm$Q8L + gm$Q1HHCbe$Q7+ Cbe$Q8L gm$Q2−Cbe$Q1gm$Q8L s+ Cbe$Q1gm$Q2sHgm$Q7+ HCbe$Q7+ Cbe$Q8L sLL Vsig
gm$Q1gm$Q2Hgm$Q7+ gm$Q8L RF1+ CompHgm$Q1+ gm$Q2L gm$Q7RF2s+ HCbe$Q7+ Cbe$Q8L CompHgm$Q1+ gm$Q2L RF2s2
s→ −gm$Q1gm$Q2Hgm$Q7+gm$Q8L RF1CompHgm$Q1+ gm$Q2L gm$Q7RF2
1.E0 1.E2 1.E4 1.E6Frequency
-505101520251.E0 1.E2 1.E4 1.E6
s→ −1.2783×106
extracted dominant pole:original/approximated
19
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SMACD98_ITWM.fm
High gain compensation
1.E0 1.E2 1.E4 1.E6Frequency
0
20
40
60
80
1.E0 1.E2 1.E4 1.E6
original/approximated
SBG result:
-1×106 -800000-600000-400000-200000 200000Re s
-400000
-200000
200000
400000
Im s
Cbc$Q4
-1×106 -800000-600000-400000-200000 200000Re s
-400000
-200000
200000
400000
Im s
Cbe$Q3
-2×106 -1.5×106 -1×106 -500000Re s
-1×106
-500000
500000
1×106
Im s
Ro$Q4
−HGm$Q2Gm$Q3Gm$Q4Gm$Q7RF2Ro$Q4Rpi$Q3VsigL êHGm$Q2Gm$Q3Gm$Q4Gm$Q7RF1Ro$Q4Rpi$Q3+ RF2sHCbc$Q8Gm$Q3HGm$Q7+ Gm$Q8L Rpi$Q3H1+Cbc$Q6Ro$Q4sL +
Cbc$Q4Gm$Q4Ro$Q4HGm$Q7+ HHCbc$Q2+ Cbc$Q3+Cbc$Q8+ Cbe$Q3L Gm$Q7+ Cbc$Q8Gm$Q8L Rpi$Q3sLLL
Goal: 45° phase & max. imaginary part
è reduce Ro$Q4
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SMACD98_ITWM.fm
High gain compensation (cont.)
+VB
1k
RF1
+
-I4
+VCC
+VDD+
-I1
Q2N2222
Q5
Q2N2907AQ3
Q2N2907A
Q7 Q8Q2N2907A
Q2
Q2N2222
Q1
Q2N2222
Q6
Q2N2907A
R1 20
R2 20
RL 100k
Q2N2907AQ4
+
-I3
+
-Vsig
RpRoQ4
10k
10000k
RF2
0
0
0
0
0
V
8
10
3
in
13
6
2
12
1
5
9
11
47
1.E0 1.E2 1.E4 1.E6Frequency
0
20
40
60
80
1.E0 1.E2 1.E4 1.E6• add ||
• adapt to keep operating-point of Q4
bandwidthwithout overshoot
R 10kΩ≈ ROQ4
I3
100kHz≈⇒
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SMACD98_ITWM.fm
Conclusions• A systematic modeling and analysis strategy has been
developed• A large variety of symbolic analysis and postprocessing
features has been used• Analysis results are evaluated in strong interaction with
numerical circuit simulator including data exchange between circuit simulator and symbolic analysis tool
• Equation-based approximation has been applied to pole/zero analysis
• Interpretation of symbolic analysis results allowed for finding appropriate circuit modifications to reach design goals
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